Keynote Talks

Keynote Talk 1

Not Your Grandparents’ Memory System

Speaker: Kimberly Keeton
Principal Software Engineer, SystemsResearch@Google

Talk abstract

Virtual memory, invented in the late 1960s, has been tremendously successful and has served us well in the last 50+ years. However, 50 years in computing is ancient history, and many early assumptions have fundamentally changed or vanished, and new challenges have arisen. Thus, in 2025, it’s worthwhile to reexamine how memory systems have changed and how memory management should adapt to these changes. In this talk, we examine several trends and their implications on memory systems. First, the migration of computation to data centers and the cloud has changed the question that memory management must answer, from how to minimize cache misses in a fixed-sized memory to how to minimize memory usage while satisfying application performance targets. This shift requires a rethinking of historical algorithms and evaluation methods. Second, the increasing cost of DRAM has led to tiered memory systems, prompting questions about how these systems should be architected, managed and evaluated. Finally, the increasing heterogeneity of compute and memory technologies means that memories are no longer strict hierarchies, leading to questions about how these resource pools should be managed.

Bio

Dr. Kimberly Keeton is a Principal Software Engineer in the SystemsResearch@Google group. Her recent research focuses on memory management and efficiency, novel memory technologies, and data management. Prior to joining Google, she was a Distinguished Technologist at Hewlett Packard Labs, where she investigated how to improve the manageability, dependability and usability of large-scale storage and information systems, and how these systems can exploit emerging technologies like persistent and disaggregated memory to improve functionality and performance. Kim received her PhD and MS in Computer Science from the University of California at Berkeley and her BS in Computer Engineering and Engineering and Public Policy from Carnegie Mellon. She is a Fellow of the ACM and the IEEE, and has served as program chair for SOSP, OSDI, EuroSys, SIGMETRICS, FAST and DSN Performance and Dependability Symposium. In her spare time, she sings with the Grammy-nominated chorus, Pacific Edge Voices.

Keynote Talk 2

Speaker: Dushyanth Narayanan
Senior Principal Researcher, Microsoft Research Cambridge

Talk abstract

AI workloads are changing the way we think about cloud infrastructure, from the silicon to the software. The money and energy needed to serve these workloads is enormous and growing rapidly. The current path is unsustainable: more than ever we need innovation and co-design across hardware, systems design, and ML algorithms or else we will not reap the full benefits of the recent amazing advances in AI. For systems researchers this is fertile ground for research that is both challenging and impactful and I will try in this talk to explain some of those challenges.

I'll start with three hardware trends that are very relevant to AI workloads -- 3D stacked memory, wide and slow optical interconnects, and analog computation. Each of these raises a set of systems challenges in managing the memory, networking and compute resources efficiently. At MSR we are taking a bet on hardware-software codesign to address these challenges. For example, we are simultaneously exploring the best core memory technology for AI, as well as how to connect it to compute, how that affects caching and reuse, and how to leverage algorithmic innovations such as sparsity and latent attention. Networking is equally crucial cause frontier models will never fit on a single compute device, and again co-design is needed to address the challenges of bandwidth at scale, energy, and fault tolerance. Finally for compute, current designs are already hitting the limits of digital CMOS -- I will talk about the potential for analog computation combined with new fixed-point model architectures to take us beyond these limits.

Bio

Dushyanth Narayanan is a systems researcher in the Future of AI Infrastructure (FAI) team at Microsoft Research Cambridge. He has worked on a range of topics from mobile computing to storage to distributed transactions. His current focus is on efficient AI and in particular on solving the memory bottleneck for AI.